2 Abstract Technologies & Performance

Common Processor Architectures

• Harvard

  • optimized for parallel fetches: separate program & data memories
  • both memories can be accessed simultaneously → higher throughput
  • typically in simple/specialized cores (DSPs, microcontrollers)

• von Neumann

  • unified program + data memory (“stored-program”)
  • simpler silicon, more flexible instruction set
  • shared bus creates the “von Neumann bottleneck” → limits throughput
  • used in general-purpose CPUs
• When to use which?
  • Harvard → real-time, low-latency embedded
  • von Neumann → complex OS, rich ISA

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Integrated Circuit Cost

• Cost per die $$\text{Cost per die}=\frac{\text{Cost per wafer}}{\text{Dies per wafer}\times \text{Yield}}$$
  • Dies per wafer ≈ $\frac{\pi (\text{wafer radius}{)}^2}{\text{die area}}$
  • Yield = fraction of good dies after fabrication defects

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CPU Performance Metrics

1. Clock rate vs. cycle time

   $$\text{Clock rate (Hz)}=\frac{1}{\text{Clock cycle time (s)}}$$

2. CPU execution time

   • via cycles × time: $$T_{\text{exec}}=\text{Clock cycles}\times \text{Clock cycle time}$$
   • via rate: $$T_{\text{exec}}=\frac{\text{Clock cycles}}{\text{Clock rate}}$$

3. Breaking down Clock cycles

   $$\text{Clock cycles}=\underset{\begin{array}{c}\text{program, ISA,}\\ \text{compiler}\end{array}}{\underbrace{\text{Instruction count}}}\times \underset{\begin{array}{c}\text{hardware implementation}\\ \text{(avg. cycles per instruction)}\end{array}}{\underbrace{\text{CPI}}}$$

4. Unified CPU time formula

   $$T_{\text{exec}}=\text{Instruction count}\times \text{CPI}\times \text{Clock cycle time}=\frac{\text{Instruction count}\times \text{CPI}}{\text{Clock rate}}$$

Performance Trade-offs

• Reduce Instruction count
  – better algorithms, more powerful ISA
• Reduce CPI
  – deeper pipelines, more parallelism
• Increase Clock rate
  – faster transistors, shorter cycle time
• Trade-off example: deeper pipelines → higher clock rate but can increase CPI on mispredictions

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Big Picture & Amdahl’s Law

• Overall speedup when improving a feature that accelerates fraction $f$ of computation by factor $S$: $${\text{Speedup}}_{\text{total}}=\frac{1}{(1-f)+\frac{f}{S}}\text{(Amdahl’s Law)}$$
  • shows diminishing returns as $f\to 1$

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