Common processor Architecture
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Harvard
- optimized for speed
- program and data memories are contained in separate machines that can be accessed simultaneously
- typically deployed on simple processors
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Von-neumann
- flexible design in which program and data share a common house
- not as efficient
- enables features not available in Harvard machines
- used in complex and most general purpose
- requires higher clock freq

Integrated circuit cost
dies per wafer* yeildcost per wafer
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CPU exc time = cpu clock cycle x clock cycle time
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CPU exec time = clockratecpu clock cycles
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- reducing number of clock cycles
- increasing clock rate
- hardware designer must often trade off clock rate against cycle count
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Clock cycels = instruction count x cycles per instruction (CPI)
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CPU time = Instruction count x CPI x Clock cycle time
Clock Rateinstruction count x CPI
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instruction counts
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average cycles per instruction (CPI)
- determined by CPU hardware
- diff instructions have different CPI
- that’s why we are using the average value
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Big picture