Assignment HW2 Question 8 VHDL Basic Logic Evil gates Logic Circuits POS and SOP Startegy for minimization Synthesis using gates Binary Shit 2s complement Significant Bit Circuit Building Blocks Arithmetic circuits Decoder and encoder Encoders and Decoders Half adder and full adder MUX and DEMUX Implementation Flipflops Implimentations and important stuff i think Sequential Circuits Asynchronous Counters Counters Edge Triggering Flip Flop Latches Gates but with feedback Meal vs Moore State minimization Synchronous Sequential Circuits Year 2 2025/Term 1 Year 2/ENSC 252/Sequential Circuits/Untitled Synchronous and Asynchronous circuits State Diagrams